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Physical Design Level -4

If there are two design where in "first Global skew is high and Latency is low" an in second "Global skew is low and Latency is Higher" which one you will prefer?

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If there is hold setup critical point which one you will fix first ?

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What are challenges have you faced while building clock tree?

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If there is one design where transition constraint is 50ps and another is with 100ps on clock , What difference do you expect ?

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There are 2 clock in the design with synchronous each other , then how tool we do crosstalk analysis ?

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